A Discrete-Event Network Simulator
API
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ff-mac-common.h
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1/*
2 * Copyright (c) 2011 Centre Tecnologic de Telecomunicacions de Catalunya (CTTC)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation;
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 *
17 * Author: Manuel Requena <manuel.requena@cttc.es>
18 */
19
20#ifndef FF_MAC_COMMON_H
21#define FF_MAC_COMMON_H
22
23#include <ns3/ptr.h>
24#include <ns3/simple-ref-count.h>
25
26#include <vector>
27
28/**
29 * Constants. See section 4.4
30 */
31#define MAX_SCHED_CFG_LIST 10
32#define MAX_LC_LIST 10
33
34#define MAX_RACH_LIST 30
35#define MAX_DL_INFO_LIST 30
36#define MAX_BUILD_DATA_LIST 30
37#define MAX_BUILD_RAR_LIST 10
38#define MAX_BUILD_BC_LIST 3
39#define MAX_UL_INFO_LIST 30
40#define MAX_DCI_LIST 30
41#define MAX_PHICH_LIST 30
42#define MAX_TB_LIST 2
43#define MAX_RLC_PDU_LIST 30
44#define MAX_NR_LCG 4
45#define MAX_MBSFN_CONFIG 5
46#define MAX_SI_MSG_LIST 32
47#define MAX_SI_MSG_SIZE 65535
48
49#define MAX_CQI_LIST 30
50#define MAX_UE_SELECTED_SB 6
51#define MAX_HL_SB 25
52#define MAX_SINR_RB_LIST 100
53#define MAX_SR_LIST 30
54#define MAX_MAC_CE_LIST 30
55
56namespace ns3
57{
58
59/// Result_e enumeration
61{
64};
65
66/// SetupRelease_e enumeration
68{
71};
72
73/// CeBitmap_e
75{
78 CR
79};
80
81/// NormalExtended_e enumeration
83{
86};
87
88/**
89 * \brief See section 4.3.1 dlDciListElement
90 * \struct DlDciListElement_s
91 */
93{
94 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
95 uint32_t m_rbBitmap{UINT8_MAX}; ///< RB bitmap
96 uint8_t m_rbShift{UINT8_MAX}; ///< RB shift
97 uint8_t m_resAlloc{UINT8_MAX}; ///< The type of resource allocation
98 std::vector<uint16_t> m_tbsSize; ///< The TBs size
99 std::vector<uint8_t> m_mcs; ///< MCS
100 std::vector<uint8_t> m_ndi; ///< New data indicator
101 std::vector<uint8_t> m_rv; ///< Redundancy version
102 uint8_t m_cceIndex{UINT8_MAX}; ///< Control Channel Element index
103 uint8_t m_aggrLevel{UINT8_MAX}; ///< The aggregation level
104 uint8_t m_precodingInfo{UINT8_MAX}; ///< precoding info
105
106 /// Format enumeration
108 {
118 } m_format{NotValid_Dci_Format}; ///< the format
119
120 uint8_t m_tpc{UINT8_MAX}; ///< Tx power control command
121 uint8_t m_harqProcess{UINT8_MAX}; ///< HARQ process
122 uint8_t m_dai{UINT8_MAX}; ///< DL assignment index
123
124 /// Vrb Format enum
126 {
130 } m_vrbFormat{NotValid_VRB_Format}; ///< the format
131
132 bool m_tbSwap{false}; ///< swap?
133 bool m_spsRelease{false}; ///< release?
134 bool m_pdcchOrder{false}; ///< cch order?
135 uint8_t m_preambleIndex{UINT8_MAX}; ///< preamble index
136 uint8_t m_prachMaskIndex{UINT8_MAX}; ///< RACH mask index
137
138 /// Ngap enum
140 {
144 } m_nGap{NotValid_Ngap}; ///< the gap
145
146 uint8_t m_tbsIdx{UINT8_MAX}; ///< tbs index
147 uint8_t m_dlPowerOffset{UINT8_MAX}; ///< DL power offset
148 uint8_t m_pdcchPowerOffset{UINT8_MAX}; ///< CCH power offset
149};
150
151/**
152 * \brief See section 4.3.2 ulDciListElement
153 * \struct UlDciListElement_s
154 */
156{
157 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
158 uint8_t m_rbStart{UINT8_MAX}; ///< start
159 uint8_t m_rbLen{UINT8_MAX}; ///< length
160 uint16_t m_tbSize{UINT16_MAX}; ///< size
161 uint8_t m_mcs{UINT8_MAX}; ///< MCS
162 uint8_t m_ndi{UINT8_MAX}; ///< NDI
163 uint8_t m_cceIndex{UINT8_MAX}; ///< Control Channel Element index
164 uint8_t m_aggrLevel{UINT8_MAX}; ///< The aggregation level
165 uint8_t m_ueTxAntennaSelection{UINT8_MAX}; ///< UE antenna selection
166 bool m_hopping{false}; ///< hopping?
167 uint8_t m_n2Dmrs{UINT8_MAX}; ///< n2 DMRS
168 int8_t m_tpc{INT8_MIN}; ///< Tx power control command
169 bool m_cqiRequest{false}; ///< CQI request
170 uint8_t m_ulIndex{UINT8_MAX}; ///< UL index
171 uint8_t m_dai{UINT8_MAX}; ///< DL assignment index
172 uint8_t m_freqHopping{UINT8_MAX}; ///< freq hopping
173 int8_t m_pdcchPowerOffset{INT8_MIN}; ///< CCH power offset
174};
175
176/**
177 * \brief Base class for storing the values of vendor specific parameters
178 */
179struct VendorSpecificValue : public SimpleRefCount<VendorSpecificValue>
180{
181 virtual ~VendorSpecificValue();
182};
183
184/**
185 * \brief See section 4.3.3 vendorSpecificListElement
186 * \struct VendorSpecificListElement_s
187 */
189{
190 uint32_t m_type{UINT32_MAX}; ///< type
191 uint32_t m_length{UINT32_MAX}; ///< length
193};
194
195/**
196 * \brief See section 4.3.4 logicalChannelConfigListElement
197 * \struct LogicalChannelConfigListElement_s
198 */
200{
201 uint8_t m_logicalChannelIdentity{UINT8_MAX}; ///< logical channel identity
202 uint8_t m_logicalChannelGroup{UINT8_MAX}; ///< logical channel group
203
204 /// Direction enum
206 {
211 } m_direction{NotValid}; ///< the direction
212
213 /// QosBearerType enum
215 {
220 } m_qosBearerType{NotValid_QosBearerType}; ///< the QOS bearer type
221
222 uint8_t m_qci{UINT8_MAX}; ///< QCI
223 uint64_t m_eRabMaximulBitrateUl{UINT64_MAX}; ///< ERAB maximum bit rate UL
224 uint64_t m_eRabMaximulBitrateDl{UINT64_MAX}; ///< ERAB maximum bit rate DL
225 uint64_t m_eRabGuaranteedBitrateUl{UINT64_MAX}; ///< ERAB guaranteed bit rate UL
226 uint64_t m_eRabGuaranteedBitrateDl{UINT64_MAX}; ///< ERAB guaranteed bit rate DL
227};
228
229/**
230 * \brief See section 4.3.6 rachListElement
231 * \struct RachListElement_s
232 */
234{
235 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
236 uint16_t m_estimatedSize{UINT16_MAX}; ///< estimated size
237};
238
239/**
240 * \brief See section 4.3.7 phichListElement
241 * \struct PhichListElement_s
242 */
244{
245 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
246
247 /// Phich enum
249 {
253 } m_phich{NotValid}; ///< the phich
254};
255
256/**
257 * \brief See section 4.3.9 rlcPDU_ListElement
258 */
260{
261 uint8_t m_logicalChannelIdentity{UINT8_MAX}; ///< logical channel identity
262 uint16_t m_size{UINT16_MAX}; ///< size
263};
264
265/**
266 * \brief See section 4.3.8 buildDataListElement
267 * \struct BuildDataListElement_s
268 */
270{
271 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
272 struct DlDciListElement_s m_dci; ///< DCI
273 std::vector<CeBitmap_e> m_ceBitmap; ///< CE bitmap
274 std::vector<std::vector<struct RlcPduListElement_s>> m_rlcPduList; ///< RLC PDU list
275};
276
277/**
278 * \brief Substitutive structure for specifying BuildRarListElement_s::m_grant field
279 */
281{
282 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
283 uint8_t m_rbStart{UINT8_MAX}; ///< start
284 uint8_t m_rbLen{UINT8_MAX}; ///< length
285 uint16_t m_tbSize{UINT16_MAX}; ///< size
286 uint8_t m_mcs{UINT8_MAX}; ///< MCS
287 bool m_hopping{false}; ///< hopping?
288 int8_t m_tpc{INT8_MIN}; ///< Tx power control command
289 bool m_cqiRequest{false}; ///< CQI request?
290 bool m_ulDelay{false}; ///< UL delay?
291};
292
293/**
294 * \brief See section 4.3.10 buildRARListElement
295 */
297{
298 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
299 // uint32_t m_grant; // Substituted with type UlGrant_s
300 UlGrant_s m_grant; ///< grant
301 struct DlDciListElement_s m_dci; ///< DCI
302};
303
304/**
305 * \brief See section 4.3.11 buildBroadcastListElement
306 */
308{
309 /// Type enum
311 {
315 } m_type{NotValid}; ///< the type
316
317 uint8_t m_index{UINT8_MAX}; ///< index
318 struct DlDciListElement_s m_dci; ///< DCI
319};
320
321/**
322 * \brief See section 4.3.12 ulInfoListElement
323 */
325{
326 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
327 std::vector<uint16_t> m_ulReception; ///< UL reception
328
329 /// Reception status enum
331 {
335 } m_receptionStatus{NotValid}; ///< the status
336
337 uint8_t m_tpc{UINT8_MAX}; ///< Tx power control command
338};
339
340/**
341 * \brief See section 4.3.13 srListElement
342 */
344{
345 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
346};
347
348/**
349 * \brief See section 4.3.15 macCEValue
350 */
352{
353 uint8_t m_phr{UINT8_MAX}; ///< phr
354 uint8_t m_crnti{UINT8_MAX}; ///< NRTI
355 std::vector<uint8_t> m_bufferStatus; ///< buffer status
356};
357
358/**
359 * \brief See section 4.3.14 macCEListElement
360 */
362{
363 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
364
365 /// MAC CE type enum
367 {
372 } m_macCeType{NotValid}; ///< MAC CE type
373 struct MacCeValue_u m_macCeValue; ///< MAC CE value
374};
375
376/**
377 * \brief See section 4.3.16 drxConfig
378 */
380{
381 uint8_t m_onDurationTimer{UINT8_MAX}; ///< on duration timer
382 uint16_t m_drxInactivityTimer{UINT16_MAX}; ///< inactivity timer
383 uint16_t m_drxRetransmissionTimer{UINT16_MAX}; ///< retransmission timer
384 uint16_t m_longDrxCycle{UINT16_MAX}; ///< long DRX cycle
385 uint16_t m_longDrxCycleStartOffset{UINT16_MAX}; ///< long DRX cycle start offset
386 uint16_t m_shortDrxCycle{UINT16_MAX}; ///< short DRX cycle
387 uint8_t m_drxShortCycleTimer{UINT8_MAX}; ///< short DRX cycle timer
388};
389
390/**
391 * \brief See section 4.3.17 spsConfig
392 */
394{
395 uint16_t m_semiPersistSchedIntervalUl{UINT16_MAX}; ///< UL semi persist schedule interval
396 uint16_t m_semiPersistSchedIntervalDl{UINT16_MAX}; ///< DL semi persist schedule interval
397 uint8_t m_numberOfConfSpsProcesses{UINT8_MAX}; ///< number of conf SPS process
398 uint8_t m_n1PucchAnPersistentListSize{UINT8_MAX}; ///< N1pu CCH persistent list size
399 std::vector<uint16_t> m_n1PucchAnPersistentList; ///< N1pu CCH persistent list
400 uint8_t m_implicitReleaseAfter{UINT8_MAX}; ///< implicit release after
401};
402
403/**
404 * \brief See section 4.3.18 srConfig
405 */
407{
408 /// Actions
410 {
411 setup
412 };
413
415 uint8_t m_schedInterval{UINT8_MAX}; ///< sched interval
416 uint8_t m_dsrTransMax{UINT8_MAX}; ///< trans max
417};
418
419/**
420 * \brief See section 4.3.19 cqiConfig
421 */
423{
424 /// Actions
426 {
427 setup
428 };
429
430 SetupRelease_e m_action; ///< CQI action
431 uint16_t m_cqiSchedInterval{UINT16_MAX}; ///< CQI schedule interval
432 uint8_t m_riSchedInterval{UINT8_MAX}; ///< RI schedule interval
433};
434
435/**
436 * \brief See section 4.3.20 ueCapabilities
437 */
439{
440 bool m_halfDuplex{false}; ///< half duplex
441 bool m_intraSfHopping{false}; ///< intra SF hopping
442 bool m_type2Sb1{false}; ///< type 2Sb1
443 uint8_t m_ueCategory{UINT8_MAX}; ///< UE category
444 bool m_resAllocType1{false}; ///< alloc type 1
445};
446
447/**
448 * \brief See section 4.3.22 siMessageListElement
449 */
451{
452 uint16_t m_periodicity{UINT16_MAX}; ///< periodicity
453 uint16_t m_length{UINT16_MAX}; ///< length
454};
455
456/**
457 * \brief See section 4.3.21 siConfiguration
458 */
460{
461 uint16_t m_sfn{UINT16_MAX}; ///< sfn
462 uint16_t m_sib1Length{UINT16_MAX}; ///< sib1 length
463 uint8_t m_siWindowLength{UINT8_MAX}; ///< window length
464 std::vector<struct SiMessageListElement_s> m_siMessageList; ///< message list
465};
466
467/**
468 * \brief See section 4.3.23 dlInfoListElement
469 */
471{
472 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
473 uint8_t m_harqProcessId{UINT8_MAX}; ///< HARQ process ID
474
475 /// HARQ status enum
477 {
480 DTX
481 };
482
483 std::vector<HarqStatus_e> m_harqStatus; ///< HARQ status
484};
485
486/**
487 * \brief See section 4.3.28 bwPart
488 */
490{
491 uint8_t m_bwPartIndex{UINT8_MAX}; ///< bw part index
492 uint8_t m_sb{UINT8_MAX}; ///< sb
493 uint8_t m_cqi{UINT8_MAX}; ///< CQI
494};
495
496/**
497 * \brief See section 4.3.27 higherLayerSelected
498 */
500{
501 uint8_t m_sbPmi{UINT8_MAX}; ///< sb PMI
502 std::vector<uint8_t> m_sbCqi; ///< sb CQI
503};
504
505/**
506 * \brief See section 4.3.26 ueSelected
507 */
509{
510 std::vector<uint8_t> m_sbList; ///< sb list
511 uint8_t m_sbPmi{UINT8_MAX}; ///< sb PMI
512 std::vector<uint8_t> m_sbCqi; ///< sb CQI
513};
514
515/**
516 * \brief See section 4.3.25 sbMeasResult
517 */
519{
520 struct UeSelected_s m_ueSelected; ///< UE selected
521 std::vector<struct HigherLayerSelected_s> m_higherLayerSelected; ///< higher layer selected
522 struct BwPart_s m_bwPart; ///< bw part
523};
524
525/**
526 * \brief See section 4.3.24 cqiListElement
527 */
529{
530 uint16_t m_rnti{UINT16_MAX}; ///< RNTI
531 uint8_t m_ri{UINT8_MAX}; ///< RI
532
533 /// CqiType_e enumeration
535 {
546 } m_cqiType{NotValid}; ///< CQI type
547
548 std::vector<uint8_t> m_wbCqi; ///< wb CQI
549 uint8_t m_wbPmi{UINT8_MAX}; ///< wb PMI
550
551 struct SbMeasResult_s m_sbMeasResult; ///< sb measure result
552};
553
554/**
555 * \brief See section 4.3.29 ulCQI
556 */
558{
559 std::vector<uint16_t> m_sinr; ///< SINR
560
561 /// Type_e enumeration
563 {
570 } m_type{NotValid}; ///< type
571};
572
573/**
574 * \brief See section 4.3.30 pagingInfoListElement
575 */
577{
578 uint8_t m_pagingIndex{UINT8_MAX}; ///< paging index
579 uint16_t m_pagingMessageSize{UINT16_MAX}; ///< paging message size
580 uint8_t m_pagingSubframe{UINT8_MAX}; ///< paging subframe
581};
582
583} // namespace ns3
584
585#endif /* FF_MAC_COMMON_H */
Smart pointer class similar to boost::intrusive_ptr.
Definition: ptr.h:77
A template-based reference counting class.
Every class exported by the ns3 library is enclosed in the ns3 namespace.
SetupRelease_e
SetupRelease_e enumeration.
Definition: ff-mac-common.h:68
@ setup
Definition: ff-mac-common.h:69
@ release
Definition: ff-mac-common.h:70
Result_e
Result_e enumeration.
Definition: ff-mac-common.h:61
@ FAILURE
Definition: ff-mac-common.h:63
@ SUCCESS
Definition: ff-mac-common.h:62
CeBitmap_e
CeBitmap_e.
Definition: ff-mac-common.h:75
NormalExtended_e
NormalExtended_e enumeration.
Definition: ff-mac-common.h:83
@ normal
Definition: ff-mac-common.h:84
@ extended
Definition: ff-mac-common.h:85
See section 4.3.11 buildBroadcastListElement.
enum ns3::BuildBroadcastListElement_s::Type_e NotValid
the type
struct DlDciListElement_s m_dci
DCI.
See section 4.3.8 buildDataListElement.
std::vector< std::vector< struct RlcPduListElement_s > > m_rlcPduList
RLC PDU list.
std::vector< CeBitmap_e > m_ceBitmap
CE bitmap.
struct DlDciListElement_s m_dci
DCI.
See section 4.3.10 buildRARListElement.
struct DlDciListElement_s m_dci
DCI.
See section 4.3.28 bwPart.
uint8_t m_cqi
CQI.
uint8_t m_bwPartIndex
bw part index
uint8_t m_sb
sb
See section 4.3.19 cqiConfig.
uint8_t m_riSchedInterval
RI schedule interval.
SetupRelease_e
Actions.
SetupRelease_e m_action
CQI action.
uint16_t m_cqiSchedInterval
CQI schedule interval.
See section 4.3.24 cqiListElement.
std::vector< uint8_t > m_wbCqi
wb CQI
struct SbMeasResult_s m_sbMeasResult
sb measure result
CqiType_e
CqiType_e enumeration.
uint8_t m_wbPmi
wb PMI
enum ns3::CqiListElement_s::CqiType_e NotValid
CQI type.
uint16_t m_rnti
RNTI.
See section 4.3.1 dlDciListElement.
Definition: ff-mac-common.h:93
uint8_t m_prachMaskIndex
RACH mask index.
uint8_t m_cceIndex
Control Channel Element index.
std::vector< uint8_t > m_ndi
New data indicator.
enum ns3::DlDciListElement_s::VrbFormat_e NotValid_VRB_Format
the format
uint8_t m_dai
DL assignment index.
uint8_t m_precodingInfo
precoding info
uint8_t m_harqProcess
HARQ process.
uint32_t m_rbBitmap
RB bitmap.
Definition: ff-mac-common.h:95
bool m_pdcchOrder
cch order?
enum ns3::DlDciListElement_s::Ngap_e NotValid_Ngap
the gap
VrbFormat_e
Vrb Format enum.
enum ns3::DlDciListElement_s::Format_e NotValid_Dci_Format
the format
Format_e
Format enumeration.
uint8_t m_preambleIndex
preamble index
uint8_t m_dlPowerOffset
DL power offset.
uint8_t m_pdcchPowerOffset
CCH power offset.
std::vector< uint8_t > m_mcs
MCS.
Definition: ff-mac-common.h:99
uint8_t m_rbShift
RB shift.
Definition: ff-mac-common.h:96
uint8_t m_resAlloc
The type of resource allocation.
Definition: ff-mac-common.h:97
uint8_t m_aggrLevel
The aggregation level.
std::vector< uint16_t > m_tbsSize
The TBs size.
Definition: ff-mac-common.h:98
std::vector< uint8_t > m_rv
Redundancy version.
uint8_t m_tpc
Tx power control command.
uint8_t m_tbsIdx
tbs index
See section 4.3.23 dlInfoListElement.
uint8_t m_harqProcessId
HARQ process ID.
HarqStatus_e
HARQ status enum.
std::vector< HarqStatus_e > m_harqStatus
HARQ status.
See section 4.3.16 drxConfig.
uint16_t m_longDrxCycleStartOffset
long DRX cycle start offset
uint16_t m_drxInactivityTimer
inactivity timer
uint16_t m_longDrxCycle
long DRX cycle
uint8_t m_drxShortCycleTimer
short DRX cycle timer
uint16_t m_drxRetransmissionTimer
retransmission timer
uint16_t m_shortDrxCycle
short DRX cycle
uint8_t m_onDurationTimer
on duration timer
See section 4.3.27 higherLayerSelected.
std::vector< uint8_t > m_sbCqi
sb CQI
See section 4.3.4 logicalChannelConfigListElement.
enum ns3::LogicalChannelConfigListElement_s::QosBearerType_e NotValid_QosBearerType
the QOS bearer type
uint64_t m_eRabMaximulBitrateUl
ERAB maximum bit rate UL.
uint64_t m_eRabGuaranteedBitrateDl
ERAB guaranteed bit rate DL.
uint8_t m_logicalChannelGroup
logical channel group
uint64_t m_eRabGuaranteedBitrateUl
ERAB guaranteed bit rate UL.
enum ns3::LogicalChannelConfigListElement_s::Direction_e NotValid
the direction
uint8_t m_logicalChannelIdentity
logical channel identity
uint64_t m_eRabMaximulBitrateDl
ERAB maximum bit rate DL.
See section 4.3.14 macCEListElement.
struct MacCeValue_u m_macCeValue
MAC CE value.
MacCeType_e
MAC CE type enum.
enum ns3::MacCeListElement_s::MacCeType_e NotValid
MAC CE type.
See section 4.3.15 macCEValue.
std::vector< uint8_t > m_bufferStatus
buffer status
uint8_t m_crnti
NRTI.
See section 4.3.30 pagingInfoListElement.
uint8_t m_pagingSubframe
paging subframe
uint8_t m_pagingIndex
paging index
uint16_t m_pagingMessageSize
paging message size
See section 4.3.7 phichListElement.
enum ns3::PhichListElement_s::Phich_e NotValid
the phich
See section 4.3.6 rachListElement.
uint16_t m_estimatedSize
estimated size
See section 4.3.9 rlcPDU_ListElement.
uint8_t m_logicalChannelIdentity
logical channel identity
See section 4.3.25 sbMeasResult.
std::vector< struct HigherLayerSelected_s > m_higherLayerSelected
higher layer selected
struct BwPart_s m_bwPart
bw part
struct UeSelected_s m_ueSelected
UE selected.
See section 4.3.21 siConfiguration.
std::vector< struct SiMessageListElement_s > m_siMessageList
message list
uint16_t m_sib1Length
sib1 length
uint8_t m_siWindowLength
window length
See section 4.3.22 siMessageListElement.
uint16_t m_periodicity
periodicity
See section 4.3.17 spsConfig.
uint8_t m_implicitReleaseAfter
implicit release after
std::vector< uint16_t > m_n1PucchAnPersistentList
N1pu CCH persistent list.
uint8_t m_n1PucchAnPersistentListSize
N1pu CCH persistent list size.
uint16_t m_semiPersistSchedIntervalUl
UL semi persist schedule interval.
uint16_t m_semiPersistSchedIntervalDl
DL semi persist schedule interval.
uint8_t m_numberOfConfSpsProcesses
number of conf SPS process
See section 4.3.18 srConfig.
uint8_t m_dsrTransMax
trans max
SetupRelease_e
Actions.
SetupRelease_e m_action
action
uint8_t m_schedInterval
sched interval
See section 4.3.13 srListElement.
uint16_t m_rnti
RNTI.
See section 4.3.20 ueCapabilities.
bool m_type2Sb1
type 2Sb1
bool m_intraSfHopping
intra SF hopping
bool m_resAllocType1
alloc type 1
bool m_halfDuplex
half duplex
uint8_t m_ueCategory
UE category.
See section 4.3.26 ueSelected.
std::vector< uint8_t > m_sbList
sb list
uint8_t m_sbPmi
sb PMI
std::vector< uint8_t > m_sbCqi
sb CQI
See section 4.3.29 ulCQI.
enum ns3::UlCqi_s::Type_e NotValid
type
std::vector< uint16_t > m_sinr
SINR.
Type_e
Type_e enumeration.
See section 4.3.2 ulDciListElement.
int8_t m_pdcchPowerOffset
CCH power offset.
int8_t m_tpc
Tx power control command.
uint8_t m_dai
DL assignment index.
uint8_t m_cceIndex
Control Channel Element index.
uint8_t m_ulIndex
UL index.
uint8_t m_ueTxAntennaSelection
UE antenna selection.
bool m_cqiRequest
CQI request.
uint8_t m_n2Dmrs
n2 DMRS
uint8_t m_freqHopping
freq hopping
uint8_t m_aggrLevel
The aggregation level.
Substitutive structure for specifying BuildRarListElement_s::m_grant field.
bool m_ulDelay
UL delay?
int8_t m_tpc
Tx power control command.
bool m_cqiRequest
CQI request?
bool m_hopping
hopping?
uint16_t m_tbSize
size
uint8_t m_rbLen
length
uint8_t m_mcs
MCS.
uint8_t m_rbStart
start
uint16_t m_rnti
RNTI.
See section 4.3.12 ulInfoListElement.
ReceptionStatus_e
Reception status enum.
uint8_t m_tpc
Tx power control command.
enum ns3::UlInfoListElement_s::ReceptionStatus_e NotValid
the status
std::vector< uint16_t > m_ulReception
UL reception.
See section 4.3.3 vendorSpecificListElement.
Ptr< VendorSpecificValue > m_value
value
Base class for storing the values of vendor specific parameters.